Field of the Invention
The present invention relates to a vehicle electronic control apparatus provided with a pair of microprocessors consisting of a first CPU and a second CPU that work as an engine control means and a transmission control means, respectively, and particularly to a vehicle electronic control apparatus improved in such a way that a plurality of saving operation means can be utilized so as to be effectively combined in accordance with an abnormality in the first CPU side and an abnormality in the second CPU side.
Description of the Related Art
In general, engine control means in a vehicle engine control system include a valve-opening control means for controlling the valve opening degree of an air-intake throttle and a basic control means consisting of an ignition control means (in the case of a gasoline engine) and a fuel injection control means; when an abnormality exists in the valve-opening control means, a first saving operation can be implemented based on a fixed throttle valve opening degree.
In contrast, a transmission control means incorporated in the vehicle engine control system or implemented by a transmission control apparatus connected with the outside of the vehicle engine control system includes a gear-shift control means that controls the transmission ratio of a continuously variable transmission in response to the step-on degree of the accelerator pedal and the present vehicle speed or performs multi-step automatic gear shifting by combining the actions of a plurality of linear solenoid valves and hydraulic-clutch hydraulic pressure control, which is another basic control means, for forward/backward switching, torque-converter lockup, all-wheel driving, and the like; when the operation of the transmission control means is stopped, forward driving with a fixed transmission ratio, suitable for a middle or high speed drive, can be implemented.
For example, according to FIG. 1 of Patent Document 1 “engine control apparatus”, listed below, there are provided a main CPU 111 that functions as an engine control means for performing fuel injection control and valve-opening control of an intake valve and a sub-CPU 121 that functions as a transmission control means; when a first abnormality storage device 133 stores an abnormality, a power-supply load relay 104a for an intake valve opening degree control motor 108 is de-energized and then sever-abnormality saving driving is implemented based on the fixed throttle valve opening degree represented in FIG. 2.
The first abnormality storage device 133 is set when a first reset signal RST1 for the main CPU 111, a second reset signal RST2 for the sub-CPU 121, an actuator-system output ER0, for valve-opening driving, that is detected by the main CPU 111, and a sever-sensor-abnormality detection output ER1 of a valve opening system occur; the first abnormality storage device 133 is reset when a power switch 107 is closed.
Patent Document 1 is characterize in that an abnormality is categorized into a sever abnormality or a slight abnormality by determining, for example, as to whether a pair of accelerator position sensors that detect the step-on degree of an accelerator pedal are both abnormal or only any one of the accelerator position sensors is abnormal or as to whether a pair of throttle position sensors that detect the intake valve opening degree are both abnormal or only any one of the throttle position sensors is abnormal, so that a simple saving operation can be implemented without relying on the fixed throttle valve opening degree.
According to FIG. 1 of Patent Document 2 “a vehicle electronic control apparatus with a monitoring control circuit”, listed below, a main control circuit unit 20A that performs fuel injection control, valve-opening control of an intake valve, and transmission control of a transmission is connected in series with a monitoring control circuit unit 30A that includes transmission-related input and output circuits; Question information for monitoring the controlling operation of the main control circuit unit 20A is transmitted thereto by the monitoring control circuit unit 30A; the monitoring control circuit unit 30A compares answer information obtained from the main control circuit unit 20A with correct answer information preliminarily stored in the monitoring control circuit unit 30A so as to determine whether or not an abnormality exists in the control by the main control circuit unit 20A; then, in the case where an abnormality is detected, the monitoring control circuit unit 30A generates a reset output RST2 so as to initialize and then restart the main control circuit unit 20A.
When detecting an abnormality in the monitoring control circuit unit 30A, the main control circuit unit 20A generates a reset output RST1 so as to initialize and then restart the monitoring control circuit unit 30A; a watchdog timer 40 monitors a watchdog signal WD, which is a pulse train signal generated by a microprocessor 20 included in the main control circuit unit 20A; when the pulse width of the watchdog signal WD exceeds a predetermined value, the watchdog timer 40 generates a reset pulse RST so as to initialize and then restart the main control circuit unit 20A and the monitoring control circuit unit 30A. Patent Document 2 is characterized in that the same question information is repeatedly transmitted in order to prolong the question communication period so that synchronous communication of upstream and downstream signals is implemented while the control load on the main control circuit unit 20A is reduced.
In contrast, according to FIG. 1 of Patent Document 3 “vehicle control apparatus”, listed below, there is disclosed a vehicle control apparatus in which a master-side core 21 included in a multicore CPU (dual-core CPU) 20 performs engine control and a slave-side core 22 performs transmission control; a monitoring IC 30, which is a watchdog timer, is connected with the multicore CPU 20; when an abnormality exists in the slave-side core 22, the master-side core 21 can perform proxy processing.
Specifically, when an abnormality exists in the slave-side core 22 that performs automatic transmission control, the master-side core 21 sets the transmission to the second fixed mode, as a simple proxy processing, so that saving operation of the vehicle can be implemented. The multicore CPU 20 in Patent Document 3 is not provided with a function of resetting each of the cores when an abnormality exists in any one of the cores; the multicore CPU 20 is of a type in which the whole cores are collectively reset (refer to Paragraph[0006]). A contrivance is provided to the multicore CPU 20 in such a way that although when an abnormality exists in the slave-side core 22, the slave-side core 22 is reset by the master-side core 21, the master-side core 21 is not reset (refer to Paragraph[0007]). When an abnormality exists in the master-side core 21, the monitoring IC 30 resets both the master-side core 21 and the slave-side core 22 so as to initialize and then restart them.
According to FIG. 1 of Patent Document 4 “a vehicle electronic control apparatus with a monitoring control circuit”, listed below, a gear-shift control apparatus 41, which is a part of an external control apparatus 40, is connected in series with a vehicle electronic control apparatus 10A by way of a main control circuit unit 20A; the vehicle electronic control apparatus 10A is provided with the main control circuit unit 20A and a monitoring control circuit unit 30A. The monitoring control circuit unit 30A periodically transmits question information to the main control circuit unit 20A and the external control apparatus 40 and compares answer information for the question information with correct answer information corresponding to expected answer information so as to determine whether or not an abnormality exists in the main control circuit unit 20A or the external control apparatus 40.
In Patent Document 4, when detecting a question-answer abnormality in the main control circuit unit 20A, the monitoring control circuit unit 30A generates a reset output RST2 so as to initialize and then restart a microprocessor in the main control circuit unit 20A; when detecting a question-answer abnormality in the external control apparatus 40, the monitoring control circuit unit 30A provides abnormality notification to the external control apparatus 40 by way of the main control circuit unit 20A; the main control circuit unit 20A responds to an engine-rotation-speed decrease demand from the external control apparatus 40; however, the main control circuit unit 20A does not respond to an engine-rotation-speed increase demand and performs control of maintaining the engine rotation speed as it is.